1. Field of the Invention
The present invention relates to a bridge system. More specifically, an apparatus and method capable of supporting multiple interface types with the same bridge system is disclosed.
2. Description of the Prior Art
The modularization of components for many of todays electronic devices has benefited manufacturers and consumers alike. The consumer has the flexibility to select from a variety of components or add additional hardware according to his or her needs. The manufacturer has the advantages of specialization, reducing costs and increasing performance of the particular component. One quite common example of such an arrangement is the ability of the user to add a device, such as an optical disc drive, to a preexisting host computer system.
As with non-modularized systems, a basic requirement for the proper functionality of the system is establishing a protocol for effective communications between the various components and the host system. Therefore, a variety of industry standard communication protocols have been developed and are currently in use, such as versions of a Universal Serial Bus (USB), Integrated Drive Electronics (IDE), and Small Computer System Interface (SCSI) interfaces as a few examples. As long as the host system and the component utilize the same protocol, communications allowing the proper functioning of the component are possible.
An obvious communication problem occurs when a user wishes to attach a device that uses one protocol to a host system connection using a different protocol, for example connecting an IDE device to a USB port of the host system. In this situation an intermediate device, or bridge, is often used between the device and the host system to permit effective communications. The bridge comprises the necessary circuitry and information to allow proper communications between the host system that utilizes a first communications protocol and the device that utilizes a second communications protocol. Costs and manufacturing concerns often result in one bridge system supporting multiple interface types. For example, one such multiple bridge system may permit connecting an IDE device with a host system utilizing either a USB port or a 1394 interface of the host system.
FIG. 1 is a functional block diagram of a prior art Host-Bridge-Device system 10 that utilizes a multiple bridge. The system 10 comprises a host system 15, a multiple bridge 20, and a device 25. A first bus interface 30 may connect the host system 15 with the multiple bridge 20 and allow communications between the host 15 and the multiple bridge 20 according to a first communications protocol A. A second bus interface 35 may connect the host system 15 with the multiple bridge 20 and allow communications between the host 15 and the multiple bridge 20 according to a second communications protocol B. A third bus interface 40 connects the multiple bridge 20 with the device 25 and allows communications between the multiple bridge 20 and the device 25 according to a third communications protocol C.
Because the multiple bridge 20 connects to only one device 25, to avoid hardware conflicts, activation of only one of either the first bus interface 30 or the second bus interface 35 is permitted at any one time. Therefore, the multiple bridge 20 comprises two bridge chips 50 and 55 to control the operations of bridge 20. Normally the two bridge chips 50 and 55 are disposed on a PCB board also comprised by the bridge 20. The bridge chip 50 is connected to the first bus interface 30 and allows communications between the host system 15 and the device 25 when the first bus interface 30 is to be utilized. The bridge chip 55 is connected to the second bus interface 35 and allows communications between the host system 15 and the device 25 when the second bus interface 35 is to be utilized. Both of the bridge chips 50 and 55 are also connected to the third bus interface 40 to complete the host system 15 to device 25 connections.
There are at least two conventional methods of selecting which one of the two bridge chips and is to be activated and which one of the two bridge chips is to be deactivated. The first method, as shown in FIG. 2, involves an additional function pin on each bridge chip 60 and 65 for enabling/disabling the bridge chips 60 and 65. The input of the functional pin may be similar to a jumper setting 70 and requires being physically set to predetermined locations according to the intended use of the bridge 45 in the multiple bridge system 80.
A second conventional method is shown in FIG. 3. This method is often applied when bridge chips do not have a functional pin for disabling/enabling the bridge chip. The Host-Bridge-Device system 90 shown in FIG. 3 differs from the system 80 of FIG. 2 in that no functional pin placement is used and enabling/disabling of bridge chips 61 and 66 is handled by a control circuit 75. The input of the control circuit 75 may be similar to a jumper setting 71 and requires being physically set to predetermined locations according to the intended use of the bridge 46 in the multiple bridge system 90. When the selected bridge chip 61 or 66 is enabled, the control circuit 75 allows the device bus interface 40 pins to connect to the output pins of the selected bridge chip 61 or 66 and blocks out all the output pins of the unselected bridge chip 61 or 66. The control circuit 75 is external to the bridge chips 61 and 66 but is usually formed on the same PCB as are the bridge chips 61 and 66 of the multiple bridge 46.
Both conventional methods are capable of determining which bridge chip is activated and which is deactivated.
However, a functional pin requires physically altering the bridge system while an inclusion of an arbitration circuit raises the cost, size, and complexity of the bridge system.